Semiconductor devices are used in a large number of electronic devices, such as computers, cell phones, and others. Semiconductor devices comprise integrated circuits that are formed on semiconductor wafers by depositing many types of thin films of material over the semiconductor wafers, and patterning the thin films of material to form the integrated circuits. Integrated circuits include field-effect transistors (FETs) such as metal oxide semiconductor (MOS) transistors.
One of the goals of the semiconductor industry is to continue shrinking the size and increasing the speed of individual FETs. Silicon on insulator (SOI) devices have been recognized as one of the possible solutions to enable continued scaling. SOI devices offer a number of advantages over bulk devices. In particular, SOI devices exhibit very low junction capacitance compared to bulk devices. The source and drain junction capacitances are almost entirely eliminated. As the buried oxide in a SOI is typically quite thick, the capacitance increase from the buried oxide is minimal. Further, SOI devices do not have body contact. Hence, unlike bulk devices, there is no body effect. The threshold voltage of stacked SOI devices is not degraded by the body effect since the body potential is not tied to a ground potential or a drain potential (Vdd) (since the body potential can rise to the same potential as the source). Finally unlike bulk devices, SOI devices have better soft error immunity. SOI devices improve soft error rate because the buried oxide blocks ionizing radiation from entering the transistor channel.
However, implementing a SOI technology requires extensive circuit design due to the different behavior of the SOI devices, which differs significantly from that of bulk devices. Cell layout and sizing are very different when using SOI technologies due to the unique electrical features of SOI devices. Consequently, direct migration of existing bulk CMOS libraries to a CMOS/SOI process is not possible. Hence, SOI technologies require an independent design kit composed of a library of standard cells (or gates), input/output cells (I/Os), and RAM and ROM compilers. Such libraries need to account for the peculiarities of each device technology. For example, for partially depleted SOI technologies, the design libraries should include propagation-delay variations caused by floating-body effects. The threshold voltage of such devices is affected by external variations that change with time. Hence, the speed of a transistor at a given time depends on its previous states (history effect). This history effect must be accounted for in the design library. The added design complexity and incompatibility with bulk devices require additional development cost, a disadvantage with adopting SOI technologies. Further, SOI starting substrates are expensive, further increasing the implementation of a SOI technology.
Hence, what is needed are structures and methods of fabricating thereof that use the cost advantages of bulk devices while leveraging the performance gains possible with SOI devices.